Paper

Deep Microcompression: Structured Pruning and Bit-packed Quantization for Microcontrollers

This paper introduces Deep Microcompression (DMC), a hardware-aware pipeline for deep learning inference on bare-metal microcontrollers. DMC integrates structured pruning, quantization-aware training, and fixed-length bit-packing to achieve a 55.8$\times$ weight compression ratio on LeNet-5 (98.77\% accuracy), generating a dependency-free C library with deterministic latency. On the RP2040 (Cortex-M0+), DMC reduces b · Authors: Opegbemi Matthias Busoye, Tolulope Matthew Busoye, Eghonghon-aye Eigbe · Published 2026-09-04 · arXiv:2609.05081

Published
2026-09-04
Authors
3
arXiv
2609.05081
Category
cs.LG

Abstract

arXiv:2609.05081

Opegbemi Matthias Busoye, Tolulope Matthew Busoye, Eghonghon-aye Eigbe

This paper introduces Deep Microcompression (DMC), a hardware-aware pipeline for deep learning inference on bare-metal microcontrollers. DMC integrates structured pruning, quantization-aware training, and fixed-length bit-packing to achieve a 55.8$\times$ weight compression ratio on LeNet-5 (98.77\% accuracy), generating a dependency-free C library with deterministic latency. On the RP2040 (Cortex-M0+), DMC reduces binary size by 3$\times$ versus TensorFlow Lite while matching its accuracy. Critically, DMC enables the first documented deployment of a standard CNN on the ATmega328P, a device constrained to 2KB SRAM, previously considered infeasible for CNN inference.